Silicon Germanium Heterojunction Bipolar Transistor for Digital Application
Abstract: Bipolar transistor
performances can be characterized by figures of merit such as cut-off
frequency, maximum frequency of oscillation and Emitter Coupled Logic gate
delay. We studied the required figures of merit for digital application and the
effects of lateral and vertical scaling to the figures of merit of SiGe
Heterojunction Bipolar Transistor. With lateral scaling, the width of emitter
finger is scaled down from 0.25 to 0.12 μm while with the vertical scaling, the
base width is scaled down to reduce the base delay. We also observed the effects
of Ge profile and Ge fraction to the devices performances. Bipole3 5.3.1G is
used to help us in the study. We found that high frequency cut-off and maximum
frequency of oscillation as well as low Emitter Coupled Logic gate delay are
all important for digital applications. Scaling down the emitter finger width
enhanced the maximum frequency of oscillation and reduced Emitter Coupled Logic
gate delay significantly while scaling down the base width increased the cutoff
frequency and current gain.
Author: Engelin Shintadewi
Julian
Journal Code: jptkomputergg120074